A Programmable System on Chip (PSOC) for Active Power Filter (APF) Based on Cortex M3

K.M. Rudrappa¹ , B.P. Divakar²

¹ Department of ECE, REVA ITM, Bengaluru, India.
² Department of EEE, REVA ITM, Bengaluru, India.

Correspondence should be addressed to: rudresh.digital@gmail.com.

Section:Review Paper, Product Type: Journal
Vol.5 , Issue.2 , pp.37-43, May-2017

Online published on May 31, 2017

Copyright © K.M. Rudrappa, B.P. Divakar . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
 

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Abstract :
The proper power distribution is more important in present days as the power demand is increasing rapidly. The parameters like reactive power and the harmonic current poses some serious problems like transformer heating, machine vibration and line losses. There is various control techniques has been adopted in recent past to overcome the above issues. The Synchronous Reference Frame (SRF) based control algorithm gives the high response as it divides both the reactive power and harmonic components. The drawback of SRF based control algorithm is that it needs proper synchronization of input current with utility voltage. The synchronization can be achieved by using the microcontroller or digital signal processing (DSP) but face fundamental challenges like high computational time, less accuracy, limited sampling time etc. This paper gives a novel PSoC by using the FPGA board, Cortex M3 board, and analog-to-digital converter (ADC), digital to analog converter (DAC) boards. In this, the existing Cypress 1/3/5 PSoC board is discussed. In order to perform the simulation over the proposed PSoC we have used the modelsim-6f and Xilinx 14.7 platforms. Also, the cathode-ray oscilloscope (CRO) is used to observe the output signals.

Key-Words / Index Term :
Directed Current Controller , FPGA, Harmonics, , PSoC, PWM, PLL, reactive power, SRF

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